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According to MIPS, a leading cellular communications chipset provider will be first to go into production with an SoC that integrates MIPS Technologies' silicon-proven 1.8v 45nm PHY.

The X5-GSPS provides a turnkey, modular solution for radio-frequency I/Q demodulation and other wideband analog signal capture applications. IP blocks available from Innovative can be embedded within the FPGA to perform digital down-conversion and decoding, unburdening the host of this computationally-intensive processing functions.

The QE32 devices address portable design requirements through optimized peripherals that enable lower operating voltage and current. QE32 MCUs are designed to run off of an ultra-low-power 32 kHz oscillator that consumes less than 7.3 microamps of current. The devices also include battery-saving features, such as two ultra-low-power stop modes, low-power run and wait modes, six microseconds wake-up time from stop mode, and clock gating registers to disable clocks or unused peripherals.

About DIGITAL-LOGIC

Note: The above text is the public part of the press release obtained from the manufacturer (with minor modifications). EETimes Europe cannot be held responsible for the claims and statements made by the manufacturer. The text is intended as a supplement to the new product presentations in EETimes Europe magazine.

IMC1812RQ391K_Vishay Dale

The X5-GSPS provides a turnkey, modular solution for radio-frequency I/Q demodulation and other wideband analog signal capture applications. IP blocks available from Innovative can be embedded within the FPGA to perform digital down-conversion and decoding, unburdening the host of this computationally-intensive processing functions.

The QE32 devices address portable design requirements through optimized peripherals that enable lower operating voltage and current. QE32 MCUs are designed to run off of an ultra-low-power 32 kHz oscillator that consumes less than 7.3 microamps of current. The devices also include battery-saving features, such as two ultra-low-power stop modes, low-power run and wait modes, six microseconds wake-up time from stop mode, and clock gating registers to disable clocks or unused peripherals.

About DIGITAL-LOGIC

Note: The above text is the public part of the press release obtained from the manufacturer (with minor modifications). EETimes Europe cannot be held responsible for the claims and statements made by the manufacturer. The text is intended as a supplement to the new product presentations in EETimes Europe magazine.

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