RLDRAM-II performance will be further enhanced by the implementation of differential input clocks, as well as differential read and write strobes. An on-chip delay lock loop (DLL) will ensure that the clock edges are aligned with the data and with the read strobe lines.

Cole said access devices using Ethernet-over-Sonet architectures have a big advantage over Ethernet-only switches. The latter, though they can offer impressive bandwidth and quality of service prioritization, still operate in a packet-only world, he said.