After a devastating year for component suppliers, Philips Semiconductors is moving to shore up its standard-IC unit, a low-profile but stable business it considers to be the foundation for its more splashy forays into the digital consumer, displays, and communications markets.

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He noted that the semiconductor industry is also exploring ways to make the use of photomasks more efficient, especially for relatively low-volume wafers where reticles can result in significant cost issues as mask sets push toward the $1 million price tag. Combining multiple customers on a single mask has been implemented with success in the foundry business,” observed Kimmel, referring to multi-project wafers that pack different chip designs on a single substrate to share processing costs for prototyping and low-volume products.

This week, the Pocatello, Idaho-based ASIC vendor will unveil what it calls a hybrid gate array, a technology AMI claims will slash the time it takes to spin a prototype while lowering manufacturing and nonrecurring-engineering (NRE) costs. Moreover, the company has designed the new ASIC platform as a drop-in replacement for Xilinx Inc.'s Virtex-E and Altera Corp.'s Apex-E 1.8-volt FPGAs.

Bella Lake, a senior researcher on the project, said: Either the superconductivity and the anti-ferromagnetism can co-exist in the same part of the material or the superconductivity is confined to the small areas in between the anti-ferromagnetic regions.